Daniel J Blueman wrote: > The ICH8 south-bridge I have is the mobile variant and does come > equipped with native parallel IDE - see page 447: > http://download.intel.com/design/chipsets/datashts/31305603.pdf . I do > see 35MB/s with DMA enabled from my CF on the 1 in 15 times the > libata-kernel does work. > > I can dump off and decode the configuration registers for the timing > and bus master registers in the working and non-working libata cases, > and the legacy ATA working case and see what's different. Does the attached patch change anything? -- tejun
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c index ad07086..47a344b 100644 --- a/drivers/ata/ata_piix.c +++ b/drivers/ata/ata_piix.c @@ -436,7 +436,7 @@ static const struct piix_map_db ich8_map_db = { /* PM PS SM SS MAP */ { P0, P2, P1, P3 }, /* 00b (hardwired when in AHCI) */ { RV, RV, RV, RV }, - { IDE, IDE, NA, NA }, /* 10b (IDE mode) */ + { P0, P2, IDE, IDE }, /* 10b (IDE mode) */ { RV, RV, RV, RV }, }, };