Scott Wood wrote:
Scott Wood wrote:
Also, what mmio-ide in the compat properly means in the context
of ide_platform which is able to handle both port and memory mapped
IDE.
I/O-space is only valid in the context of PCI, ISA, or similar buses,
and
the bus-specific reg format indicates whether it's mmio-space or
io-space.
You could save time on lecturing me (and use it to look on the
driver ;-).
Sorry, I misread the question as being a mismatch between the
capabilities of the device binding and the driver, not about the
specific compatible name.
That too. :-)
Something like "generic-ide" would probably be better.
I strongly disagree with "generic" part. The generic IDE could only be
said of 1:1 I/O mapped IDE ports, not about this fancy mapping.
What is board specific about a set of standard IDE registers at a given
The regisrer mapping used is highly non-standard.
The gap between registers is nonstandard, but that's a fairly common
type of noncompliance in embedded-land, and probably merits being
That is only a common variation of embedded non-compliancy (which doesn't
make it a compliancy. ;-)
There are worse cases in the bi-endian land, even with the standard 8-bit
regs and 1-byte stride. *Hopefully*, this driver could also support those...
supported in a generic way. I wouldn't call it "highly" nonstandard.
Yeah, there are also 8250 "compatible" UARTs that use 32-bit memory
accesses, and even worse -- with some registers mapped differently than on
8250 (those can't be called compatible by any means), yet 8250.c drives all of
them. I'm not really sure it was such a good idea to merge, say Alchemy UART
support into 8250.c.
Is there some other non-standardness that I'm missing?
*Hopefully*, none. The original Kumar's driver pretended to handle
byte-lane swapping too (but that was ugly :-).
We're already in board specific code, so why the heck not? :-)
various ns16550-compatibles out there as well?
I never suggested that -- what I did suggest was make of_serial.c
recognize certain chip types and register them with 8250 driver.
What would be the advantage of maintaining a list of chips whose only
Nobody's talking about the advantages, just about the device tree accepted
practices (which we've already tried to bypass with MTD node -- causing a lot
of bashing until David Woodhouse came to help :-).
difference is register spacing, rather than just using reg-shift and
being done with it?
Please read the linuxppc-dev archive's threads following form David's
patches. Or maybe Segher could repeat this for you. ;-)
-Scott
MBR, Sergei
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