Linas Vepstas wrote:
HPT36x chip don't seem to have the channel enable bits, so prevent the IDE core from checking them...
Signed-off-by: Sergei Shtylyov <sshtylyov@xxxxxxxxxxxxx>
d->channels = 1; + d->enablebits[0].reg = 0;
The original patch worked for me.
Linas, Andries, Michal, cound you try this instead: d->enablebits[0].mask = d->enablebits[0].val = 0x10;
Based on the printk's from my system, this should work fine. The config register had 0x33 in it, so 0x33 & mask == val for me. I'll reply tommorrow if this doesn't work.
It probably won't work the way it should anyway -- the secondary channel (and controller in this case) uses another bit in this register and the controllers get registered with IDE core "in pair". Highpoint knows how to make broken hardware. :-)
--linas
MBR, Sergei - To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
