Re: The 5th bar of ide controller at legacy mode

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O> 0x0000000000000000 0x00000000000003ff 0x0000000000000200
> 0x0000000000000000 0x0000000000000000 0x0000000000000000
> 
> The 5th bar is incorrect. BIOS initiates ide controllers.

You appear to have a 5th BAR allocated at address 0 with a length of
0x400. 

> failure, but ide-cd/piix is smarter to recall pci_enable_device_bars
> directly with parameter bars=(1<<4), so only 0~4th bar resources are checked.

the old IDE code deals only with SFF interfaces in simple modes, and hand
does all the handling for BAR 0-3 because of old PCI layer flaws and
weaknesses.

> So my question is: should ata/ata_piix also need to recall pci_enable_device_bars
> with parameter bars=(1<<4) if pci_enable_device fails like what ide-cd/piix does?

Your platform code or BIOS is buggy. PPC people had a similar problem.
Zero is not currently taken as "unallocated" by the PCI layer and, while
Linus suggested it could be, Dave Woodhouse and others pointed out there
are systems which legitimately use address 0 on the PCI in this way.

Sounds like you need to fix up after your firmware in your boot code,
perhaps with an arch specific pci header quirk.

Alan
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