On Thu, 07 Dec 2006 13:28:02 +0900 Tejun Heo <htejun@xxxxxxxxx> wrote: > Please test the attached patch. That should be getting done automatically by the driver and used to work with the old eh/probe code. It does rely on having done the initial PIO0 identify of both devices and the mode decision being made before mode setting functions are called however, and that is/was documented as a guarantee, and is relied upon all over. Definitely worth testing Art, especially if it shows something up. Tejun: pata_amd does the timing merges itself both for 8bit which is shared and in the timing compute for the DMA cases. Also the other pattern to these reports is ATAPI, although that might I guess be a symptom of "slave". The other problem is that mmio bus reset is broken, but the AMD always uses PIO cycles so that shouldn't be involved. Alan (still baffled by this one) - To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
