Hello. Sergei Shtylyov wrote:
I believe this is completely the wrong thing to do. Adding a ton of changes to the existing (and stable) life expired drivers/ide driver rather than keeping new and risky stuff in the new libata code is bad.
The new and risky stuff is long agon in there.
The existing code *works*, its been rock solid since the reset drain fix
Don't make me laugh. pdc202xx_new certainly doesn't deserve these compliments. It has known PLL problems even on x86 if you have more than 2 contorollers
Oh, and I forgot to add that Ultra133 chips don't get the proper timings even on x86 -- they get overclocked b/c BIOS programs 133 MHz DPLL clock and the chip auto-loads the 100 MHz timings (overriding the driver's override).
I don't see the point in risking destabilising a good solid driver. I can just about see justification for !X86 implementation of the PLL handling but that is about it.
All in a good time.
The main patches are gonna appear in a few days (at last).
Alan
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