Re: [PATCH] libata: waits up to 10 microseconds for early irq problem

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



> > The IRQ delivery is async to the I/O so this makes a lot of sense for all
> > cases.
> 
> I don't think that's true unless the controller is doing something funky 
> as in SET XFERMODE.  Can you enlighten me?

It is true for all cases. There is no synchronization between interrupt
delivery and I/O cycles and both of them are asynchronous. It is
especially obvious on older APIC based boxes that use a 4 wire bus to
send interrupt messages around.

This leads to suprising sequences like


	device raises IRQ
				kernel blocks device IRQ at chip
				kernel reads to post the block
				kernel does other stuff
	IRQ message finally arrives
				IRQ taken

-
To unsubscribe from this list: send the line "unsubscribe linux-ide" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[Index of Archives]     [Linux Filesystems]     [Linux SCSI]     [Linux RAID]     [Git]     [Kernel Newbies]     [Linux Newbie]     [Security]     [Netfilter]     [Bugtraq]     [Yosemite News]     [MIPS Linux]     [ARM Linux]     [Linux Security]     [Samba]     [Device Mapper]

  Powered by Linux