20us isn't enough for some SATA controllers (sata_nv) ending up not
sending the second FIS27 to clear SRST. This usually results in SRST
timeout causing excessive delays during hotplug.
This patch lengthens the delay from 20us to 1ms and also converts it
to msleep() instead of busy wait.
Signed-off-by: Tejun Heo <htejun@xxxxxxxxx>
---
Hello, Jim Paris, Philipp Wagner.
Can you guys please give this patch a shot? This patch is againt
libata-dev#upstream so if you're using 2.6.18, the patched file
(libata-core.c) wouldn't be there. If that's the case, just edit
drivers/scsi/libata-core.c accordng to the following patch (replace
udelay(20)s in ata_bus_softreset() w/ msleep(1)).
Jeff, this function is called from both old EH and new EH's
ata_std_softreset(). I think this change is safe but curious about
your opinion.
Thanks.
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index 753b015..007020e 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -2414,15 +2414,15 @@ static unsigned int ata_bus_softreset(st
/* software reset. causes dev0 to be selected */
if (ap->flags & ATA_FLAG_MMIO) {
writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
- udelay(20); /* FIXME: flush */
+ msleep(1); /* FIXME: flush */
writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
- udelay(20); /* FIXME: flush */
+ msleep(1); /* FIXME: flush */
writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
} else {
outb(ap->ctl, ioaddr->ctl_addr);
- udelay(10);
+ msleep(1);
outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
- udelay(10);
+ msleep(1);
outb(ap->ctl, ioaddr->ctl_addr);
}
-
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