Re: PCI SATA controllers on embedded, no-BIOS targets

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Tejun Heo wrote:
Kevin Hilman wrote:
I've personally seen it working on XScale and ATI's mips.

OK, that's good to know.

For the record, for ATI's new mips platform, sata_sil needs some modifications. Their PCI bridge can't handle byte-aligned mmio and the driver had to be modified to use IO address space.

I'm using 2.6.18-rc4 on this XScale IXP425 (big endian) and both the legacy driver (drivers/ide/pci/siimage.c) and the libata driver (drivers/scsi/sata_sil.c) cause crashes during probing due to bad memory accesses.

So, that one can't do byte-aligned mmio either?

Switching the legacy driver into PIO mode makes the probing work well, but still can't figure out what's happening in the libata driver, AFICT, it can't do PIO.

By PIO, you mean accessing registers via IO address space instead of memory address space, right? Not PIO as opposed to DMA.

Any chance you can share the changes to use IO address space? Maybe the PCI on this XScale has similar limitations.

Sure, I've just got okay for releasing the code and am going to post the patches on my website anyway. I'm attaching a patch. This might not apply cleanly to your kernel but it should give enough idea. Oh the code kills 4 ports support for 3114 too.

s/kills/doesn't support/

--
tejun
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