zhao, forrest wrote:
Hello, all
0 Why this RFC?
Although AHCI spec 1.1 provides a detailed explanation about how to play
with CCC-related registers to enable CCC, several CCC-policy-related
parameters need to be defined(or the consensus need to be achieved)
before we start to write the code.
To brag a bit, I pushed Intel heavily for this feature, in the
pre-AHCI-1.0 development days.
From my understanding, the measurement of "IRQ numbers per second"
should be based on per-port instead of all ports of a SATA controller.
No, it should be all ports of a SATA controller.
If an interrupt arrives while CCC is active, we should take the
opportunity to check all ports for activity -- as the standard code does
now.
4 What should the software specified timeout be?
I don't have the strong reasoning of a specific timeout value. 500ms? or
1000ms? We should trade-off between the delay and overhead.
500ms is a lot of latency.
Jeff
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