Jeff Garzik wrote:
Tejun wrote:
Hello, Jean & 0602.
I was digging ICH docs to reimplement ata_piix initialization and
found out that 6300ESB lists high bits (the present bits) of PCS
register as reserved. But they indiciate that the bits might change
anytime just as in other docs. I think something went wrong with those
bits in that particular chipset and Intel decided to ignore the bits.
I'm wondering whether your problems are related to this. Can you guys
please run 'lspci -n' on your machines which had the piix
initialization trouble and report the result here?
Note that we still get the PCS bits wrong because, e.g. they only apply
to ports 0 and 2 on some chipsets, not ports 0 and 1 like you would expect.
Jeff, can you please elaborate? I'm currently looking at datasheets for
ICH5, 6, 7 and 6300ESB but can't really understand what you're saying.
Doesn't PCS + MAP give the whole picture?
--
tejun
-
: send the line "unsubscribe linux-ide" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at http://vger.kernel.org/majordomo-info.html
