Re: bit fields && data tearing
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- To: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
- Subject: Re: bit fields && data tearing
- From: "Paul E. McKenney" <paulmck@xxxxxxxxxxxxxxxxxx>
- Date: Fri, 5 Sep 2014 14:05:43 -0700
- Cc: "H. Peter Anvin" <hpa@xxxxxxxxx>, Peter Hurley <peter@xxxxxxxxxxxxxxxxxx>, Marc Gauthier <marc@xxxxxxxxxxx>, Michael Cree <mcree@xxxxxxxxxxxx>, Benjamin Herrenschmidt <benh@xxxxxxxxxxxxxxxxxxx>, David Laight <David.Laight@xxxxxxxxxx>, Jakub Jelinek <jakub@xxxxxxxxxx>, "linux-arch@xxxxxxxxxxxxxxx" <linux-arch@xxxxxxxxxxxxxxx>, Tony Luck <tony.luck@xxxxxxxxx>, "linux-ia64@xxxxxxxxxxxxxxx" <linux-ia64@xxxxxxxxxxxxxxx>, Oleg Nesterov <oleg@xxxxxxxxxx>, "linux-kernel@xxxxxxxxxxxxxxx" <linux-kernel@xxxxxxxxxxxxxxx>, Paul Mackerras <paulus@xxxxxxxxx>, "linuxppc-dev@xxxxxxxxxxxxxxxx" <linuxppc-dev@xxxxxxxxxxxxxxxx>, Miroslav Franc <mfranc@xxxxxxxxxx>, Richard Henderson <rth@xxxxxxxxxxx>, "linux-alpha@xxxxxxxxxxxxxxx" <linux-alpha@xxxxxxxxxxxxxxx>
- In-reply-to: <alpine.DEB.2.10.1409052247460.5472@nanos>
- List-id: <linux-ia64.vger.kernel.org>
- References: <54091B30.2090509@zytor.com> <20140905081648.GB5281@omega> <20140905180950.GU5001@linux.vnet.ibm.com> <540A05F7.1070202@hurleysoftware.com> <20140905190506.GV5001@linux.vnet.ibm.com> <8CA974F497CA064FA9926E10ABCC061F05F97E7B77@MAILSJ4.global.cadence.com> <540A19B8.4010907@hurleysoftware.com> <540A1E6C.2020005@zytor.com> <20140905204312.GA5001@linux.vnet.ibm.com> <alpine.DEB.2.10.1409052247460.5472@nanos>
- Reply-to: paulmck@xxxxxxxxxxxxxxxxxx
- User-agent: Mutt/1.5.21 (2010-09-15)
On Fri, Sep 05, 2014 at 10:48:34PM +0200, Thomas Gleixner wrote:
> On Fri, 5 Sep 2014, Paul E. McKenney wrote:
> > On Fri, Sep 05, 2014 at 01:34:52PM -0700, H. Peter Anvin wrote:
> > > On 09/05/2014 01:14 PM, Peter Hurley wrote:
> > > >
> > > > Here's how I read the two statements.
> > > >
> > > > First, the commit message:
> > > >
> > > > "It [this commit] documents that CPUs [supported by the Linux kernel]
> > > > _must provide_ atomic one-byte and two-byte naturally aligned loads and stores."
> > > >
> > > > Second, in the body of the document:
> > > >
> > > > "The Linux kernel no longer supports pre-EV56 Alpha CPUs, because these
> > > > older CPUs _do not provide_ atomic one-byte and two-byte loads and stores."
> > > >
> > >
> > > Does this apply in general or only to SMP configurations? I guess
> > > non-SMP configurations would still have problems if interrupted in the
> > > wrong place...
> >
> > And preemption could cause problems, too. So I believe that it needs
> > to be universal.
>
> Well preemption is usually caused by an interrupt, except you have a
> combined load and preempt instruction :)
Fair point! ;-)
Thanx, Paul
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