RE: bit fields && data tearing
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- To: "paulmck@xxxxxxxxxxxxxxxxxx" <paulmck@xxxxxxxxxxxxxxxxxx>, Peter Hurley <peter@xxxxxxxxxxxxxxxxxx>
- Subject: RE: bit fields && data tearing
- From: Marc Gauthier <marc@xxxxxxxxxxx>
- Date: Fri, 5 Sep 2014 12:38:56 -0700
- Accept-language: en-US
- Acceptlanguage: en-US
- Cc: Michael Cree <mcree@xxxxxxxxxxxx>, "H. Peter Anvin" <hpa@xxxxxxxxx>, Benjamin Herrenschmidt <benh@xxxxxxxxxxxxxxxxxxx>, David Laight <David.Laight@xxxxxxxxxx>, Jakub Jelinek <jakub@xxxxxxxxxx>, "linux-arch@xxxxxxxxxxxxxxx" <linux-arch@xxxxxxxxxxxxxxx>, Tony Luck <tony.luck@xxxxxxxxx>, "linux-ia64@xxxxxxxxxxxxxxx" <linux-ia64@xxxxxxxxxxxxxxx>, Oleg Nesterov <oleg@xxxxxxxxxx>, "linux-kernel@xxxxxxxxxxxxxxx" <linux-kernel@xxxxxxxxxxxxxxx>, Paul Mackerras <paulus@xxxxxxxxx>, "linuxppc-dev@xxxxxxxxxxxxxxxx" <linuxppc-dev@xxxxxxxxxxxxxxxx>, Miroslav Franc <mfranc@xxxxxxxxxx>, Richard Henderson <rth@xxxxxxxxxxx>, "linux-alpha@xxxxxxxxxxxxxxx" <linux-alpha@xxxxxxxxxxxxxxx>
- In-reply-to: <20140905190506.GV5001@linux.vnet.ibm.com>
- List-id: <linux-ia64.vger.kernel.org>
- References: <54079B70.4050200@hurleysoftware.com> <1409785893.30640.118.camel@pasglop> <063D6719AE5E284EB5DD2968C1650D6D17487172@AcuExch.aculab.com> <1409824374.4246.62.camel@pasglop> <5408E458.3@zytor.com> <54090AF4.7060406@hurleysoftware.com> <54091B30.2090509@zytor.com> <20140905081648.GB5281@omega> <20140905180950.GU5001@linux.vnet.ibm.com> <540A05F7.1070202@hurleysoftware.com> <20140905190506.GV5001@linux.vnet.ibm.com>
- Thread-index: Ac/JPd380KP5u2JFSQ6cINmaJt/uXQAAoQ5Q
- Thread-topic: bit fields && data tearing
Paul E. McKenney wrote:
>On Fri, Sep 05, 2014 at 02:50:31PM -0400, Peter Hurley wrote:
>>On 09/05/2014 02:09 PM, Paul E. McKenney wrote:
>>> This commit documents the fact that it is not safe to use bitfields as
>>> shared variables in synchronization algorithms. It also documents that
>>> CPUs must provide one-byte and two-byte load and store instructions
>> ^
>> atomic
>
> Here you meant non-atomic? My guess is that you are referring to the
> fact that you could emulate a one-byte store on pre-EV56 Alpha CPUs
> using the ll and sc atomic-read-modify-write instructions, correct?
>
>>> in order to be supported by the Linux kernel. (Michael Cree
>>> has agreed to the resulting non-support of pre-EV56 Alpha CPUs:
>>> https://lkml.org/lkml/2014/9/5/143.
[...]
>>> + and 64-bit systems, respectively. Note that this means that the
>>> + Linux kernel does not support pre-EV56 Alpha CPUs, because these
>>> + older CPUs do not provide one-byte and two-byte loads and stores.
>> ^
>> non-atomic
>
> I took this, thank you!
Eum, am I totally lost, or aren't both of these supposed to say "atomic" ?
Can't imagine requiring a CPU to provide non-atomic loads and stores
(i.e. requiring old Alpha behavior?).
-Marc
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