This seems crazy to me. Flushing should occur according to the *architecture*, not model-by-model. Even if we happen to get "lucky" on pre-Montecito CPUs, that doesn't justify such ugly hacks. Or you really want to debug this *again* come next CPU? --david On 7/30/07, KAMEZAWA Hiroyuki <kamezawa.hiroyu@xxxxxxxxxxxxxx> wrote: > > Add "L2 cache is separated? check flag" as read_mostly global variable. > > This add one memory reference to global variable to page faults of "executable" > map in do_wp_page(page copy case), file-mapped page fault and some system calls > which does memory map changes. But not so bad as calling sync_icache_dcache in > architectures which doesn't need it. > > Signed-off-by: KAMEZAWA Hiroyuki <kamezawa.hiroyu@xxxxxxxxxxxxxx> > > > --- > arch/ia64/kernel/setup.c | 7 +++++++ > include/asm-ia64/pgtable.h | 3 ++- > 2 files changed, 9 insertions(+), 1 deletion(-) > > Index: linux-2.6.23-rc1.test/arch/ia64/kernel/setup.c > =================================================================== > --- linux-2.6.23-rc1.test.orig/arch/ia64/kernel/setup.c > +++ linux-2.6.23-rc1.test/arch/ia64/kernel/setup.c > @@ -106,6 +106,8 @@ struct io_space io_space[MAX_IO_SPACES]; > EXPORT_SYMBOL(io_space); > unsigned int num_io_spaces; > > +int separated_l2_icache_dcache __read_mostly; > + > /* > * "flush_icache_range()" needs to know what processor dependent stride size to use > * when it makes i-cache(s) coherent with d-caches. > @@ -718,6 +720,11 @@ get_model_name(__u8 family, __u8 model) > printk(KERN_ERR > "%s: Table overflow. Some processor model information will be missing\n", > __FUNCTION__); > + /* Montecito has separated L2 Icache and Dcache. This requires > + synchronize Icache and Dcache before set_pte() */ > + if (family == 0x20) > + separated_l2_icache_dcache = 1; > + > return "Unknown"; > } > > Index: linux-2.6.23-rc1.test/include/asm-ia64/pgtable.h > =================================================================== > --- linux-2.6.23-rc1.test.orig/include/asm-ia64/pgtable.h > +++ linux-2.6.23-rc1.test/include/asm-ia64/pgtable.h > @@ -489,9 +489,10 @@ extern struct page *zero_page_memmap_ptr > * as an executable pte. > */ > extern void __sync_icache_dcache(pte_t pte); > +extern int separated_l2_icache_dcache; > static inline void sync_icache_dcache(pte_t pte) > { > - if (pte_exec(pte)) > + if (pte_exec(pte) && separated_l2_icache_dcache) > __sync_icache_dcache(pte); > } > #define __HAVE_ARCH_SYNC_ICACHE_DCACHE > > - > To unsubscribe from this list: send the line "unsubscribe linux-ia64" in > the body of a message to majordomo@xxxxxxxxxxxxxxx > More majordomo info at http://vger.kernel.org/majordomo-info.html > -- Mosberger Consulting LLC, http://www.mosberger-consulting.com/ - To unsubscribe from this list: send the line "unsubscribe linux-ia64" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
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