Hi Yoshihiro,
On Thu, Oct 24, 2024 at 07:15:53AM +0000, Yoshihiro Furudera wrote:
> Enable DWAPB I2C controller support on FUJITSU-MONAKA.
> This will be used in the FUJITSU-MONAKA server scheduled
> for shipment in 2027.
>
> The DSDT information obtained when verified using an
> in-house simulator is presented below.
>
> Device (SMB0)
> {
> Name (_HID, "FUJI200B") // _HID: Hardware ID
> Name (_UID, Zero) // _UID: Unique ID
> ...
> Name (_CRS, ResourceTemplate ()
> {
> Memory32Fixed (ReadWrite,
> 0x2A4B0000, // Address Base
> 0x00010000, // Address Length
> )
> Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
> {
> 0x00000159,
> }
> })
> ...
> }
>
> The expression SMB0 is used to indicate SMBus HC#0,
> a string of up to four characters.
>
> Created the SMB0 object according to the following
> specifications:
>
> ACPI Specification
> 13.2. Accessing the SMBus from ASL Code
> https://uefi.org/htmlspecs/ACPI_Spec_6_4_html/13_ACPI_System_Mgmt_Bus_Interface_Spec/accessing-the-smbus-from-asl-code.html
>
> IPMI Specification
> Example 4: SSIF Interface(P574)
> https://www.intel.co.jp/content/www/jp/ja/products/docs/servers/ipmi/ipmi-second-gen-interface-spec-v2-rev1-1.html
>
> Signed-off-by: Yoshihiro Furudera <fj5100bi@xxxxxxxxxxx>
Pushed to i2c/i2c-host.
Thanks,
Andi
