Hi Devyn, On Thu, Feb 01, 2024 at 02:13:45PM +0800, Devyn Liu wrote: > The driver receives the tx fifo almost empty(aempty) interrupt and > reads the tx_aempty_int_mstat to start a round of data transfer. > The operation of clearing the TX aempty interrupt after completing > a write cycle is added to ensure that the FIFO is truly at almost > empty status when an aempty interrupt is received. > The threshold for fifo almost empty interrupt is defined as 1. > > Signed-off-by: Devyn Liu <liudingyuan@xxxxxxxxxx> Reviewed-by: Yicong Yang <yangyicong@xxxxxxxxxxxxx> Reviewed-by: Andi Shyti <andi.shyti@xxxxxxxxxx> Thanks, Andi
