On 10/12/2023 03:28, Andi Shyti wrote:
Hi Quan, On Fri, Dec 08, 2023 at 10:31:41AM +0700, Quan Nguyen wrote:Some masters may drive the transfers with low enough latency between the nak/stop phase of the current command and the start/address phase of the following command that the interrupts are coalesced by the time we process them. Handle the stop conditions before processing SLAVE_MATCH to fix the complaints that sometimes occur below. "aspeed-i2c-bus 1e78a040.i2c-bus: irq handled != irq. Expected 0x00000086, but was 0x00000084" Fixes: f9eb91350bb2 ("i2c: aspeed: added slave support for Aspeed I2C driver") Signed-off-by: Quan Nguyen <quan@xxxxxxxxxxxxxxxxxxxxxx>Reviewed-by: Andi Shyti <andi.shyti@xxxxxxxxxx>
Thanks Andi, I'll add your Reviewed-by in v4 Thanks, - Quan
