Hi Will, thanks a lot for this summary! > and I think the high-level problem was something like: > > 1. CPU x writes some stuff to memory (I think one example was i2c_dw_xfer() > setting 'dev->msg_read_idx' to 0) > 2. CPU x writes to an I/O register on this I2C controller which generates > an IRQ (end of i2c_dw_xfer_init()) > 3. CPU y takes the IRQ > 4. CPU y reads 'dev->msg_read_idx' and doesn't see the write from (1) > > (i2c folks: please chime in if I got this wrong) I admit that I didn't dive into this specific discussion. But we had this kind of re-ordering problem in the past in i2c, so avoiding the relaxed_* where possible came to be a good thing in my book. So, I recommended removing it for all writes, not only the one causing problems here. relaxed_* should only be used when really needed. So, this is why I applied the patch, plus I trust the people giving their tags after the in-depth discussion. But yeah, if somebody more experienced with this driver could double-check against the potential locking problem, this would be good.
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