Hi, Am Mittwoch, 11. Oktober 2023, 13:25:55 CEST schrieb Krzysztof Hałasa: > Stefan, > > > I cannot answer whether the delay is needed for atomic transfer or not. > > But I can give a bit of context for I2C atomic transfers in general. > > > > These where only introduced for a very narrow and special uses shutting > > down the device/power with external PMICs in the kernel's shutdown > > handlers. > > Well, I guess I'm abusing this code a bit. > > The problem is I use Sony IMX290 and IMX462 image sensors, and they have > an apparently hard-coded timeout of about 2^18 their master clock cycles > (= ca. 7 ms with my setup). After the timeout they simply disconnect > from the I2C bus. Of course, this isn't mentioned in the docs. > Unfortunately, "normal" I2C accesses take frequently more than those > 7 ms (mostly due to scheduling when all CPU cores are in use). So I > hacked the IMX I2C driver a bit and now all accesses to the sensor use > the atomic paths and local_irq_save() (inside the driver only). I assume that the master clock is running independently to I2C from the SoC the sensor is attached to. Your calculations indicate you are assuming ~400kHz I2C clock frequency. But nothing is preventing that sensor from running on a 100kHz I2C bus. Even this "atomic" hack will not be sufficient in that case. Best regards, Alexander > > My understand is that an ordinary I2C device would just use normal (and > > sleepable) I2C transfers while the device is in use. > > You are spot-on here :-) Now I use IMX 290 and 462. > > OTOH I wonder if such issues are limited to those sensors only. > > Thanks for your immediate response, -- TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany Amtsgericht München, HRB 105018 Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider http://www.tq-group.com/
