On Mon, Jan 16, 2023 at 07:48:10PM +0200, Andy Shevchenko wrote: > On Mon, Jan 16, 2023 at 04:22:09PM +0000, Limonciello, Mario wrote: > > > From: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx> > > > Sent: Monday, January 16, 2023 06:39 > > > To: Jan Dąbroś <jsd@xxxxxxxxxxxx> > > > On Mon, Jan 16, 2023 at 11:19:00AM +0100, Jan Dąbroś wrote: > > > > > > Make init_amd_nbs() arch_initcall_sync() so that it executes after PCI > > > init. > > > > > > > > I described earlier in this thread why such option is not working - > > > > let me quote myself: > > > > > > > > It's not enough for running init_amd_nbs() to have only > > > > pci_arch_init() done. We need the pci bus to be created and registered > > > > with all devices found on the bus. We are traversing through them and > > > > trying to find northbridge VID/DID. Due to the above, we need to run > > > > init_amd_nbs() only after acpi_scan_init() that is invoked from > > > > acpi_init() which is registered as subsys_initcall. That's why the > > > > trick with switching init_amd_nbs() to arch_initcall_sync will not > > > > work. > > > > > > > > We have a kind of chicken-and-egg problem here. Or is there something I > > > missed? > > > > > > > > I wonder if there is upstreamable option to control order of the > > > > drivers' init by forcing link order? > > > > > > But what exactly do you need from North Bridge? Is it only its existence or > > > do you need to have fully instantiated PCI device (if so, why?)? > > > > There is a need to be able to write and read PCI config space. > > So, it's available even on early stages, are there some specifics why it can't > be done using the respective APIs? I think I understood the problem with the above. You probably don't know where NB can be located in the topology and that's why you can't simply access a _fixed_ BDF. So you want to have the topology being scanned beforehand. -- With Best Regards, Andy Shevchenko
