Hi Corentin, On Mon, 14 Nov 2022 11:56:06 +0000, Corentin Labbe wrote: > On my x05 laptop I got: > Memory type 0x12 not supported yet, not instantiating SPD > > Adding the 0x12 case lead to a successful instantiated SPD AT24 EEPROM. > i801_smbus 0000:00:1f.3: SMBus using polling > i2c i2c-6: 2/2 memory slots populated (from DMI) > at24 6-0050: 256 byte spd EEPROM, read-only > i2c i2c-6: Successfully instantiated SPD at 0x50 > at24 6-0051: 256 byte spd EEPROM, read-only > > And then, I decoded it successfully via decode-dimms. > > Signed-off-by: Corentin Labbe <clabbe@xxxxxxxxxxxx> > --- > Changes since v1: > - Added memory type document link > - Added case for LPDDR > > drivers/i2c/i2c-smbus.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/i2c/i2c-smbus.c b/drivers/i2c/i2c-smbus.c > index 07c92c8495a3..c85710ed9548 100644 > --- a/drivers/i2c/i2c-smbus.c > +++ b/drivers/i2c/i2c-smbus.c > @@ -361,9 +361,15 @@ void i2c_register_spd(struct i2c_adapter *adap) > return; > } > > + /* > + * Memory types could be found at section 7.18.2 (Memory Device — Type), table 78 > + * https://www.dmtf.org/sites/default/files/standards/documents/DSP0134_3.6.0.pdf > + */ > switch (common_mem_type) { > + case 0x12: /* DDR */ > case 0x13: /* DDR2 */ > case 0x18: /* DDR3 */ > + case 0x1B: /* LPDDR */ > case 0x1C: /* LPDDR2 */ > case 0x1D: /* LPDDR3 */ > name = "spd"; Reviewed-by: Jean Delvare <jdelvare@xxxxxxx> Thanks, -- Jean Delvare SUSE L3 Support
