On 2/9/22 7:02 PM, Arnd Bergmann wrote:
>>>>> since 2009 after 1e1030dccb10 ("sh: nmi_debug support."). On a
>>>>
>>>> Mhm... this commit changes the SH3 code while SH778x are SH4A, no?
>>>
>>> This code is shared between both:
>>>
>>> arch/sh/kernel/cpu/sh4/Makefile:common-y += $(addprefix
>>> ../sh3/, entry.o ex.o)
>>
>> Ah, quite convoluted! :-)
>> So you mean thet broke the delivery of EVT 0x200 when mucking with NMI?
>
> Yes, exactly: If I read this right, the added code:
>
> + shlr2 r4
> + shlr r4
> + mov r4, r0 ! save vector->jmp table offset for later
> +
> + shlr2 r4 ! vector to IRQ# conversion
> + add #-0x10, r4
> +
> + cmp/pz r4 ! is it a valid IRQ?
> + bt 10f
>
> gets the vector (0x200 for this device), shifts it five bits to 0x10,
> and subtracts 0x10,
> then branches to do_IRQ if the interrupt number is non-zero, otherwise it goes
> through the exception_handling_table.
The SH4 manual I found on my disk (have it from MontaVista times) tells me cmp/pz
sets T if Rn is >= 0, then bt branches if T = 1. So I do think the code is correct.
One more thing: the board code for those boards was added in 2011, we can assume
it was working back then, right? :-_
> Arnd
MBR, Sergey
