Hi Adam, On Fri, 10 Apr 2020 15:48:44 -0500, Adam Honse wrote: > The AMD X370 and other AM4 chipsets (A/B/X 3/4/5 parts) and Threadripper equivalents have a secondary SMBus controller at I/O port address 0x0B20. This bus is used by several manufacturers to control motherboard RGB lighting via embedded controllers. I have been using this bus in my OpenRGB project to control the Aura RGB on many motherboards and ASRock also uses this bus for their Polychrome RGB controller. > > See this kernel bug report: https://bugzilla.kernel.org/show_bug.cgi?id=202587 > > I am not aware of any CZ-compatible platforms which do not have the second SMBus channel. All of AMD's AM4- and Threadripper- series chipsets that OpenRGB users have tested appear to have this secondary bus. I also noticed this secondary bus is present on older AMD platforms including my FM1 home server. Please wrap the patch description at 75 columns. Note that ./scripts/checkpatch.pl would tell you about that. Maybe Wolfram can fix if for your this time, if not you'll have to resubmit. > > Signed-off-by: Adam Honse <calcprogrammer1@xxxxxxxxx> > > --- > drivers/i2c/busses/i2c-piix4.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c > index 30ded6422e7b..69740a4ff1db 100644 > --- a/drivers/i2c/busses/i2c-piix4.c > +++ b/drivers/i2c/busses/i2c-piix4.c > @@ -977,7 +977,8 @@ static int piix4_probe(struct pci_dev *dev, const struct pci_device_id *id) > } > > if (dev->vendor == PCI_VENDOR_ID_AMD && > - dev->device == PCI_DEVICE_ID_AMD_HUDSON2_SMBUS) { > + (dev->device == PCI_DEVICE_ID_AMD_HUDSON2_SMBUS || > + dev->device == PCI_DEVICE_ID_AMD_KERNCZ_SMBUS)) { > retval = piix4_setup_sb800(dev, id, 1); > } > Fine with me. Reviewed-by: Jean Delvare <jdelvare@xxxxxxx> -- Jean Delvare SUSE L3 Support
