Stefan Wahren <stefan.wahren@xxxxxxxx> writes: > Am 29.05.19 um 06:29 schrieb Annaliese McDermond: >> Model the I2C bus clock divider as a part of the Core Clock Framework. >> Primarily this removes the clk_get_rate() call from each transfer. >> This call causes problems for slave drivers that themselves have >> internal clock components that are controlled by an I2C interface. >> When the slave's internal clock component is prepared, the prepare >> lock is obtained, and it makes calls to the I2C subsystem to >> command the hardware to activate the clock. In order to perform >> the I2C transfer, this driver sets the divider, which requires >> it to get the parent clock rate, which it does with clk_get_rate(). >> Unfortunately, this function will try to take the clock prepare >> lock, which is already held by the slave's internal clock calls >> creating a deadlock. >> >> Modeling the divider in the CCF natively removes this dependency >> and the divider value is only set upon changing the bus clock >> frequency or changes in the parent clock that cascade down to this >> divisor. This obviates the need to set the divider with every >> transfer and avoids the deadlock described above. It also should >> provide better clock debugging and save a few cycles on each >> transfer due to not having to recalcuate the divider value. >> >> Signed-off-by: Annaliese McDermond <nh6z@xxxxxxxx> > > Acked-by: Stefan Wahren <stefan.wahren@xxxxxxxx> FWIW, also: Reviewed-by: Eric Anholt <eric@xxxxxxxxxx>
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