Hi Jan,
On 03.05.19 17:03, Jan Breuer wrote:
On Fri 3. 5. 2019 at 15:06 Stefan Roese wrote:
This patch adds a driver for the I2C controller found on the MediaTek
MT7621/7628/7688 SoC's. The base version of this driver was done by
Steven Liu (according to the copyright and MODULE_AUTHOR lines). It
can be found in the OpenWRT repositories (v4.14 at the time I looked).
The base driver had many issues, which are disccussed here:
https://en.forum.labs.mediatek.com/t/openwrt-15-05-loads-non-working-i2c-kernel-module-for-mt7688/1286/3
From this link an enhanced driver version (complete rewrite, mayor
changes: support clock stretching, repeated start, ACK handling and
unlimited message length) from Jan Breuer can be found here:
https://gist.github.com/j123b567/9b555b635c2b4069d716b24198546954
This patch now adds this enhanced I2C driver to mainline.
Changes by Stefan Roese for upstreaming:
- Add devicetree bindings
- checkpatch clean
- Use module_platform_driver()
- Minor cosmetic enhancements
Signed-off-by: Stefan Roese <sr@xxxxxxx <mailto:sr@xxxxxxx>>
Hi Stefan,
Thank you for this mainlining affort.
We are using this driver in production for a while and there is at
least one issue.
SDA and SCL should be in open-drain mode and not in push-pull.
SM0CTL0_ODRAIN bit is inverted in meaning so it should not be set
during initialization in mtk_i2c_reset to configure output as open-drain.
Here is relevant part of documentation of this bit from datasheet.
SM0CTL0 Serial interface master 0 control 0 register
Bit 31 SM0_ODRAIN Open-drain output configuration
0: When SIF output is logic 1, the output is pulled high by outer#
devices. SIF output is open-drained.
1: When SIF output is logic 1, the output is pulled high by SIF
master 0.
Thanks for the update here. I'll update the ODRAIN bit configuration
in v2 of this patch.
Might I ask you how you detected this issue? Did you experience some
problems in the I2C communication on your target with the push-pull
configuration?
Thanks,
Stefan
