Hi Annaliese, Am 05.05.19 um 05:43 schrieb Annaliese McDermond: > Model the I2C bus clock divider as a part of the Core Clock Framework. > Primarily this removes the clk_get_rate() call from each transfer. > This call causes problems for slave drivers that themselves have > internal clock components that are controlled by an I2C interface. > When the slave's internal clock component is prepared, the prepare > lock is obtained, and it makes calls to the I2C subsystem to > command the hardware to activate the clock. In order to perform > the I2C transfer, this driver sets the divider, which requires > it to get the parent clock rate, which it does with clk_get_rate(). > Unfortunately, this function will try to take the clock prepare > lock, which is already held by the slave's internal clock calls > creating a deadlock. i think i understand the problem, but could you please explain the specific use case where this happend? I suspect bcm2835 is not the only platform which is affected, so it would be better to fix this in general. Regards Stefan
