Hi Wolfram,
On Tue, Mar 5, 2019 at 7:11 PM Wolfram Sang
<wsa+renesas@xxxxxxxxxxxxxxxxxxxx> wrote:
> When sending with DMA, the driver transfers the first byte with PIO (as
> documented). However, it started DMA right after the first byte was
> written. This worked, but was not according to the datasheet which
> suggests to wait until data register was empty again. Implement this.
>
> Signed-off-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>
Thanks for your patch!
> --- a/drivers/i2c/busses/i2c-rcar.c
> +++ b/drivers/i2c/busses/i2c-rcar.c
> @@ -480,6 +480,10 @@ static void rcar_i2c_irq_send(struct rcar_i2c_priv *priv, u32 msr)
> if (!(msr & MDE))
> return;
>
> + /* Check if DMA can be enabled and take over */
> + if (priv->pos == 1 && rcar_i2c_dma(priv))
Shouldn't you check if MSR.MAT is set?
> + return;
Hence ICMCR.ESG is not cleared, violating 57.3.8 (Master Transmit
Operation), Step 3?
> +
> if (priv->pos < msg->len) {
> /*
> * Prepare next data to ICRXTX register.
> @@ -490,13 +494,6 @@ static void rcar_i2c_irq_send(struct rcar_i2c_priv *priv, u32 msr)
> */
> rcar_i2c_write(priv, ICRXTX, msg->buf[priv->pos]);
> priv->pos++;
> -
> - /*
> - * Try to use DMA to transmit the rest of the data if
> - * address transfer phase just finished.
> - */
> - if (msr & MAT)
> - rcar_i2c_dma(priv);
> } else {
> /*
> * The last data was pushed to ICRXTX on _PREV_ empty irq.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
