Hi, On 17. 12. 18 23:57, Wolfram Sang wrote: > Hi, > > On Fri, Dec 14, 2018 at 11:58:37AM +0530, Shubhrajyoti Datta wrote: >> In case the hold bit is not needed we are carrying the old values >> fix the same by resetting the bit when receive count is less than the >> fifo depth. >> >> Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xxxxxxxxxx> > > > Thanks for this patch, yet I have some questions: > > * Is this the response to Kyle's patch "Revert "i2c: cadance: fix > ctrl/addr reg write order"? If so, that should be mentioned somewhere. > > * If so, Kyle should get a Reported-by tag? And a Fixes tag should be > added? > > * Even if this is not related to Kyle's issue, is this a bugfix? Shubhrajyoti: Please fix description and send v2. Thanks, Michal
