Hi, On Fri, Dec 14, 2018 at 11:58:37AM +0530, Shubhrajyoti Datta wrote: > In case the hold bit is not needed we are carrying the old values > fix the same by resetting the bit when receive count is less than the > fifo depth. > > Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xxxxxxxxxx> Thanks for this patch, yet I have some questions: * Is this the response to Kyle's patch "Revert "i2c: cadance: fix ctrl/addr reg write order"? If so, that should be mentioned somewhere. * If so, Kyle should get a Reported-by tag? And a Fixes tag should be added? * Even if this is not related to Kyle's issue, is this a bugfix? * Furthermore, Michal is listed as the maintainer, so I will wait until he acks this patch. Seeing Shubhrajyoti is also from Xilinx, does it make sense to add him as a maintainer for this driver? > This email and any attachments are intended for the sole use of the > named recipient(s) and contain(s) confidential information that may be > proprietary, privileged or copyrighted under applicable law. If you > are not the intended recipient, do not read, copy, or forward this > email message or any attachments. Delete this email message and any > attachments immediately. This makes zero sense on a mailing list. Please remove. Regards, Wolfram
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