Hi, this is my first post to the linux-i2c mail forum, let’s see how it works out. :-) It is about the i2c-mpc driver and how it calculates the values of the FDR and DFSR registers. This is done by mpc_i2c_get_fdr_8xxx in i2c-mpc.c when called from mpc_i2c_setup_8xxx and ultimately fsl_i2c_probe, which is of course the the entry point for the driver. mpc_i2c_setup_8xxx sets the registers FDR and DFSR registers based on the return value of mpc_i2c_get_fdr_8xxx where the most significant byte is in fact the DFSR. The values of these two registers are expressed in a table mpc_i2c_dividers_8xxx. The table is fixed in the sense that there is no flexibility to select C (DFSR) which is the sampling rate of the digital filter. Referring to the famous AN2919, the first step for obtaining the divider equation is to select C (DFSR) fulfilling conditions such as for example C <= 50 / T where T is the period of SCL. But the driver calculates its divider to a fixed value based on system frequency, requested SCL and a fixed prescaler value: divider = fsl_get_sys_freq() / clock / prescaler Thereafter the function iterates over the mpc_i2c_dividers_8xxx table mentioned above and to me it seems inevitable that only one value of C (DFSR) can ever be selected for a given input. For example, with fsl_get_sys_freq() = 400 MHz, requested clock speed on the i2c bus is 100 kHz and the prescaler being 2 we will get 2000 as the divider and always choose the entry with divider 2048 leading to the return value being 0x012f thus setting DFSR (C) to 0x1 and FDR to 0x2F. However, it might be preferable to choose a value of C (DFSR) =0xa instead, which is not possible in the driver. I have looked around a bit and the bareBox driver is actually very different in the way that it calculates the values based on the algorithms and criteria of AN2919. And feeding it with the same values of platform frequency (400MHz / 2 (prescaler) = 200MHz) and requested frequency of SCL (100 kHz) as fed to the Linux driver, gives a value of 0xa of DFSR and 0x2F for FDR. i.e. BareBox gives an equally fixed value as the Linux driver, but with different values. Since the different values of DFSR can give different behavior on the i2c bus it might be helpful to be able to tune DFSR? Anyone who has any background in how the data of mpc_i2c_dividers_8xxx has been selected apart from that most of them are from the “FDR Based on a DFSR Value of 0x01” (for example the above mentioned 0x12F)? Some values I have failed to match to a specific table in AN2919. For example 416, it has the value of 0x0602 → DFSR 0x06 and FDR 0x02. I find two tables (tables 7 and 8) that have the value 416, but they lead to the conclusion that the value should be either 0x1001 or 0x2322. How does one come to the conclusion of 0x0602? Maybe it is so that I have failed to understand AN2919 completely and that C inevitably needs to have a fixed value? If not, anyone with an opinion on whether or not to enable C to be configurable? Also, anyone with an opinion on whether the Linux driver or the BareBox approach is preferable? As you see, I have more questions than answers; any background information, pointers to previous discussions and opinions would be very much appreciated. Cheers, Leif Enblom
