Re: [PATCH] i2c: designware: Resume PMICs shared with the PUNIT earlier

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On 09/10/2018 03:29 PM, Mika Westerberg wrote:
On Sat, Sep 08, 2018 at 08:29:59PM +0200, Hans de Goede wrote:
After recent kernel changes Bay and Cherry Trail devices where the I2C bus
to the PMIC is shared with PUNIT properly reach S0ix states when suspended.

As explained in detail in the commit message of commit 9d9a152ebaa8 ("i2c:
designware: Re-init controllers with pm_disabled set on resume"), the
I2C controller for this bus has an effectively empty _PS3 ACPI method and
thus is left in D0 during suspend. It seems to somehow automatically
powerdown once S0i3 is reached, which means that it needs to be
reinitialized on resume for us to be able to use it again.

The referred commit adds the necessary code to re-init the controller
to the drivers resume_early method. It turns out that for some devices
this is too late. On a Peaq C1010 2-in-1 tablet/laptop doing the re-init
from resume_early leads to the device rebooting on resume.

This commit moves the re-init to resume_noirq, fixing this. Note this
means that the controller re-init now happens before the early_resume
handler from drivers/acpi/acpi_lpss.c runs. Which means that the
controller was not put in D0 yet when we re-init, this is not a problem
since the controller was never put in D3 in the first place.

This has been tested on the Peaq C1010 and one other Bay Trail device and
Cherry Trail device, both of which have an I2C bus shared with the PUNIT
too.

Fixes: 9d9a152ebaa8 ("i2c: designware: Re-init controllers with ...")
Signed-off-by: Hans de Goede <hdegoede@xxxxxxxxxx>

Reviewed-by: Mika Westerberg <mika.westerberg@xxxxxxxxxxxxxxx>

Would it be better to leave out Fixes tag in order to not needlessly consume Greg's time or state explicitly that 9d9a152ebaa8 becomes problem only if f11fc4bc669b ("ACPI / LPSS: Force LPSS quirks on boot") is applied?

Acked-by: Jarkko Nikula <jarkko.nikula@xxxxxxxxxxxxxxx>



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