+ Luis
On 03/18/2018 02:35 PM, Alexander Monakov wrote:
Hi,
starting from commit fba4adbbf6705 ("i2c: designware: must wait for enable"),
users on hardware where the Designware I2C controller simply does not have
the enable status register will see timeout warnings and 25ms delays on each
transfer.
This was not an issue before because all existing __i2c_dw_enable_and_wait
calls supplied 'false' as the last argument, so as the non-existing status
register was read as 0, the loop was exited on the first iteration.
U-Boot deals with this issue by statically configuring for such hardware:
http://git.denx.de/?p=u-boot.git;a=commitdiff;h=b6a77b0ce8ac21c154f02907c
(I've noticed the issue on Marvell BG2CD SoC, not SPEAr).
Their solution is not applicable for the kernel, though. I wonder if it would
be possible to check DW_IC_COMP_VERSION for presence of the status register,
similar to how SDA hold time configurability is tested now?
I see specification mentions that for older IP versions have to monitor
two registers IC_STATUS and IC_RAW_INTR_STAT but don't say exactly how.
Luis: Do you know can the availability of IC_ENABLE_STATUS register 0x9c
be seen from DW_IC_COMP_VERSION and how to find the same enabled status
from those two registers?
--
Jarkko
