On Mon, Aug 14, 2017 at 10:17:26PM +0200, Hans de Goede wrote: > The Cherry Trail Whiskey Cove PMIC's IRQ line is attached to one of > the GPIOs of the Cherry Trail SoC. The CHT GPIO controller sometimes > fails to deliver IRQs (seen when there is an IRQ storm on another pin). > > This commit works around this by reducing the long timeout which was > a poor attempt to workaround this from 3s to 30ms and after that > manually checking the status register for transfer completion by > calling the threaded IRQ handler directly. > > This is safe todo as the entire threaded IRQ handler is protected > by a mutex. > > Note 30ms should be more then long enough, at 100KHz any smbus single > byte transaction should be finished in 4ms. > > Signed-off-by: Hans de Goede <hdegoede@xxxxxxxxxx> Applied to for-next, thanks!
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