On Tue, Mar 14, 2017 at 10:53:29PM +0100, Heiner Kallweit wrote: > The bus frequency won't change, therefore we can set the clock divider > in probe already and we don't have to set it for each transfer. This is true for some SoCs, but not for all. So, some proof we can really do it like this would be nice in the commit message, e.g. "parent clock is fixed anyhow" or something. > > Signed-off-by: Heiner Kallweit <hkallweit1@xxxxxxxxx>
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