Re: [PATCH v2 0/3] i2c: designware-pci: refactor and add Merrifield support

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On 06/15/2016 06:05 PM, Andy Shevchenko wrote:
Tested on bare metal (Intel Edison) by enumerating I2C GPIO expanders.

In v2:
- leave bus 3 at STD speed for Medfield
- be consistent with workflow, i.e. call ->setup, and _then_ assign to i2c
  properties
- add a comment to explain magic numbers for Merrifield
- add an Ack for patch 3

Andy Shevchenko (3):
  i2c: designware-pci: Make bus number allocation robust
  i2c: designware-pci: Introduce Merrifield support
  i2c: designware-pci: Sort header block alphabetically

 drivers/i2c/busses/i2c-designware-core.h   |   1 +
 drivers/i2c/busses/i2c-designware-pcidrv.c | 143 +++++++++++++++++------------
 2 files changed, 86 insertions(+), 58 deletions(-)

--
2.8.1

To the series (patch 3 has my ack already):

Acked-by: Jarkko Nikula <jarkko.nikula@xxxxxxxxxxxxxxx>
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