Hi Wolfram, On Fri, 12 Feb 2016 20:27:20 +0100, Wolfram Sang wrote: > On Fri, Jan 29, 2016 at 10:44:52AM +0100, Jean Delvare wrote: > > The SB800 register reference guide says that the SMBus port selection > > bits may not always be in register Smbus0En (0x2c) but could > > alternatively be found in register Smbus0Sel (0x2e) depending on the > > settings in register Smbus0SelEn (0x2f.) Add support for this > > configuration. > > Were you able to test both cases? I don't have the hardware myself so I was not able to test any case. I was hoping Christian would test. This is the reason why I am logging which register is used, so that we know if the alternative setting is ever used. I found the potential problem by looking at the datasheet, it's not something that has been reported (yet.) Meanwhile I have found a datasheet for device 780Bh (named Bolton FCH on AMD's web site, but Hudson2 in our driver) which suggest that the "alternative" setting is the only possible one on this chipset. The register used to figure out the setting is marked as reserved. If the register exists still and the relevant bit is set, then my patch should work. If not then a better patch will be needed. I'll try to gain access to a system with a Bolton FCH and experiment with it. Then there's the most recent device, codenamed "CZ", for which I have no information at all. -- Jean Delvare SUSE L3 Support -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
