Re: [PATCH] i2c: davinci: Fix bus rate calculation on Keystone SoC

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Hello Wolfram,

On 12/08/15 10:43, ext Wolfram Sang wrote:
>> > My opinion - it's time for compatible string :) "ti,keystone-i2c". 
>> > Especially taking int account two things:
>> > 1) In Datasheet SPRS893B TCI6630K2L Multicore DSP+ARM KeyStone II System-on-Chip (SoC) (Rev. E) 
>> >    values for those registers specified as:
>> >    0x0034 ICPID1 I2C Peripheral Identification Register 1 [value: 0x0000 0105]
>> >    0x0038 ICPID2 I2C Peripheral Identification Register 2 [value: 0x0000 0005]
>> >    (actually the same is in k2h, k2e Datasheets).
>> > 
>> > 2) This is not the first time such discussion has been raised.
>> > 
>> > 
>>>>> > >> > This is not really critical fix. Currently bus rate is lower than expected because of these
>>>>> > >> > calculation errors. The fix maximizes the bus rate. So newer SoCs will run little bit slower
>>>>> > >> > until support is added to this part of the code. Not really critical. 
>> > 
>> > Regarding the patch itself:
>> > - Seems the "d" value is fixed to 6 as per User Guide SPRUGV3
>> >   "KeyStone Architecture 2 Inter-IC Control Bus (I2C)" and this change is correct. 
>> >   It would be nice to have ref on document in commit message as above.
>> > 
>> > - I think, it will be very useful to have same real digits/calculation mentioned in
>> >   commit message which can show how valuable is the improvement. 
> Alexander, any comments to this feedback?

I would need to rework the patch to distinguish Keystones basing on DT compatible property.
I will re-send another version along with actual bofore-after real world numbers.
Thanks for feedback!

-- 
Best regards,
Alexander Sverdlin.
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