Hi all, The writel/readl is too expensive especially on Cortex A9 w/ outer L2 cache. This introduce i2c read/write error on Marvell Berlin SoCs when there are L2 cache maintenance operations at the same time. In our internal berlin bsp, we just replaced readl/writel with the relaxed version. But AFAIK, the "relaxed" version doesn't exist on all architectures. How to handle this issue? Any suggestions are appreciated. Thanks in advance, Jisheng -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
