RE: [PATCH 1/2] i2c-piix4: Add support for AMD ML and CZ SMBus changes

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Hi Jean,

> As the mask used for smb_en_status doesn't depend on the value of
> "aux", this implies that on the Hudson-2, a single bit controls if both
> SMBus controllers are enabled. It's not possible to enable one and
> disable the other. Is it correct, or is it an overlook?

Good question. This is the current design, not an overlook.

> BTW it would be really great if we could have access to the
> documentation for these new AMD chipsets. I looked for both Hudson and
> FCH at http://developer.amd.com/ but these searches returned nothing. I
> could help better if I had access to the documentation / datasheets.

I don't know who is the website maintainer but forwarded your question
to our FCH datasheet maintainer, and he will follow up. I hope that it will
be improved in near future. :-)

BTW, will this patch appear from kernel 3.14-rc1 ?


Thanks,
Shane


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