Dear Marek Vasut, > This patch configures the I2C bus timing registers according > to information passed via DT. Currently, 100kHz and 400kHz > modes are supported. [...] > +struct mxs_i2c_speed_config { > + uint32_t timing0; > + uint32_t timing1; > + uint32_t timing2; > +}; > + > +/* Timing values for the default 24MHz clock supplied into the i2c block. Thinking about these further -- does anyone have any idea how these numbers were derived? And possibly even formula for that? And maybe we should somehow make sure the source runs on 24MHz (how?). > */ +const struct mxs_i2c_speed_config mxs_i2c_95kHz_config = { > + .timing0 = 0x00780030, > + .timing1 = 0x00800030, > + .timing2 = 0x0015000d, > +}; > + > +const struct mxs_i2c_speed_config mxs_i2c_400kHz_config = { > + .timing0 = 0x000f0007, > + .timing1 = 0x001f000f, > + .timing2 = 0x0015000d, > +}; [...] Best regards, Marek Vasut -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html