Dear Shubhrajyoti Datta,
> On Sat, Jun 9, 2012 at 12:24 AM, Marek Vasut <marex@xxxxxxx> wrote:
> > This patch configures the I2C bus timing registers according
> > to information passed via DT. Currently, 100kHz and 400kHz
> > modes are supported.
> >
> > Signed-off-by: Marek Vasut <marex@xxxxxxx>
> > Cc: Detlev Zundel <dzu@xxxxxxx>
> > CC: Dong Aisheng <b29396@xxxxxxxxxxxxx>
> > CC: Fabio Estevam <fabio.estevam@xxxxxxxxxxxxx>
> > Cc: Linux ARM kernel <linux-arm-kernel@xxxxxxxxxxxxxxxxxxx>
> > Cc: linux-i2c@xxxxxxxxxxxxxxx
> > CC: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
> > CC: Shawn Guo <shawn.guo@xxxxxxxxxx>
> > Cc: Stefano Babic <sbabic@xxxxxxx>
> > CC: Uwe Kleine-König <u.kleine-koenig@xxxxxxxxxxxxxx>
> > Cc: Wolfgang Denk <wd@xxxxxxx>
> > Cc: Wolfram Sang <w.sang@xxxxxxxxxxxxxx>
> > ---
> > Documentation/devicetree/bindings/i2c/i2c-mxs.txt | 1 +
> > arch/arm/boot/dts/imx28.dtsi | 2 +
> > drivers/i2c/busses/i2c-mxs.c | 54
> > +++++++++++++++++++++ 3 files changed, 57 insertions(+)
> >
> > V2: Use clock-frequency instead
> >
> > diff --git a/Documentation/devicetree/bindings/i2c/i2c-mxs.txt
> > b/Documentation/devicetree/bindings/i2c/i2c-mxs.txt index
> > 1bfc02d..d2bf750 100644
> > --- a/Documentation/devicetree/bindings/i2c/i2c-mxs.txt
> > +++ b/Documentation/devicetree/bindings/i2c/i2c-mxs.txt
> > @@ -4,6 +4,7 @@ Required properties:
> > - compatible: Should be "fsl,<chip>-i2c"
> > - reg: Should contain registers location and length
> > - interrupts: Should contain ERROR and DMA interrupts
> > +- clock-frequency: desired I2C bus clock frequency in Hz.
> >
> > Examples:
> >
> > diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
> > index a89da5a..714e63c 100644
> > --- a/arch/arm/boot/dts/imx28.dtsi
> > +++ b/arch/arm/boot/dts/imx28.dtsi
> > @@ -398,6 +398,7 @@
> > compatible = "fsl,imx28-i2c";
> > reg = <0x80058000 2000>;
> > interrupts = <111 68>;
> > + clock-frequency = <400000>;
> > status = "disabled";
> > };
> >
> > @@ -407,6 +408,7 @@
> > compatible = "fsl,imx28-i2c";
> > reg = <0x8005a000 2000>;
> > interrupts = <110 69>;
> > + clock-frequency = <400000>;
> > status = "disabled";
> > };
> >
> > diff --git a/drivers/i2c/busses/i2c-mxs.c b/drivers/i2c/busses/i2c-mxs.c
> > index 04eb441..b4d083f 100644
> > --- a/drivers/i2c/busses/i2c-mxs.c
> > +++ b/drivers/i2c/busses/i2c-mxs.c
> > @@ -46,6 +46,10 @@
> > #define MXS_I2C_CTRL0_DIRECTION 0x00010000
> > #define MXS_I2C_CTRL0_XFER_COUNT(v) ((v) & 0x0000FFFF)
> >
> > +#define MXS_I2C_TIMING0 (0x10)
> > +#define MXS_I2C_TIMING1 (0x20)
> > +#define MXS_I2C_TIMING2 (0x30)
> > +
> > #define MXS_I2C_CTRL1 (0x40)
> > #define MXS_I2C_CTRL1_SET (0x44)
> > #define MXS_I2C_CTRL1_CLR (0x48)
> > @@ -97,6 +101,24 @@
> > #define MXS_CMD_I2C_READ (MXS_I2C_CTRL0_SEND_NAK_ON_LAST | \
> > MXS_I2C_CTRL0_MASTER_MODE)
> >
> > +struct mxs_i2c_speed_config {
> > + uint32_t timing0;
> > + uint32_t timing1;
> > + uint32_t timing2;
> > +};
> > +
> > +const struct mxs_i2c_speed_config mxs_i2c_95kHz_config = {
>
> You are using 95k?
Yes
> Didnt understand this.
What exactly, it's running (according to the datasheet) at 95kHz.
> > + .timing0 = 0x00780030,
> > + .timing1 = 0x00800030,
> > + .timing2 = 0x0015000d,
> > +};
> > +
> > +const struct mxs_i2c_speed_config mxs_i2c_400kHz_config = {
> > + .timing0 = 0x000f0007,
> > + .timing1 = 0x001f000f,
> > + .timing2 = 0x0015000d,
> > +};
> > +
>
> How are these values calculated?
They're not calculated, they're presented in the datasheet. There's no formula,
even though I believe one could be derived given enough effort.
Best regards,
Marek Vasut
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