On Mon, Apr 30, 2012 at 10:01:46AM +0800, Richard Zhao wrote: > > > > > > > > clk_register_clkdev(clk[ipg], "ipg", "2028000.ssi"); > > > ssi don't have ipg gate. We can let it always on for imx6q. > > > > Can you please ask your IC guys for clarification? > > > > For example on i.MX5 we have a ssi ipg clock and a ssi serial clock. > > Both can be gated with two individual gate bits. > > > > The i.MX6 datasheet (and also several other i.MX datasheets) is quite > > nebulous. The i.MX6 has only one gate bit for each SSI unit, but > > it's not clear if this bit actually gates both the ipg and serial > > clock or only one of them. > You're right. ipg and serial clocks share the same gate. How do we > handle it? I think it's not the only one and won't be last one. We don't have support for a single gate gating two clocks right now and I don't know how this fits into the clock framework. We could pretend that only the ipg clock is gateable because this is needed anyway when the SSI unit is used. It seems we need a proper solution for this later. Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
