RE: [EXTERNAL] Re: [PATCH 1/1] PCI: hv: Support for create interrupt v3

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> > +/*
> > + * struct hv_msi_desc3 - 1.3 version of hv_msi_desc
> > + *	Everything is the same as in 'hv_msi_desc2' except that the size
> > + *	of the 'vector_count' field is larger to support bigger vector
> > + *	values. For ex: LPI vectors on ARM.
> > + */
> > +struct hv_msi_desc3 {
> > +	u32	vector;
> > +	u8	delivery_mode;
> > +	u8	reserved;
> > +	u16	vector_count;
> > +	u16	processor_count;
> > +	u16	processor_array[32];
> > +} __packed;
> > +
> >  /**
> >   * struct tran_int_desc
> >   * @reserved:		unused, padding
> > @@ -383,6 +402,12 @@ struct pci_create_interrupt2 {
> >  	struct hv_msi_desc2 int_desc;
> >  } __packed;
> >
> > +struct pci_create_interrupt3 {
> > +	struct pci_message message_type;
> > +	union win_slot_encoding wslot;
> > +	struct hv_msi_desc3 int_desc;
> > +} __packed;
> > +
> >  struct pci_delete_interrupt {
> >  	struct pci_message message_type;
> >  	union win_slot_encoding wslot;
> > @@ -1334,26 +1359,55 @@ static u32 hv_compose_msi_req_v1(
> >  	return sizeof(*int_pkt);
> >  }
> >
> > +static void hv_compose_msi_req_get_cpu(struct cpumask *affinity, int *cpu,
> > +				       u16 *count)
> 
> Isn't count redundant here? I don't see how this can be used safely for
> passing back more than 1 cpu, since if cpu is pointing to an array, its
> size is not specified.
> 
> Wei.

Yes, it is at the moment. But, the function can be extended in the future to take
a size as well. But, it will always be 1 and I preferred keeping that information
with the implementation. If you have preference, I can hard code that in the
caller. It seems fine for me either ways.

- Sunil




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