On Thu, Jul 08, 2021 at 11:04:49PM +0000, Sunil Muthuswamy wrote:
> Hyper-V vPCI protocol version 1_4 adds support for create interrupt
> v3. Create interrupt v3 essentially makes the size of the vector
> field bigger in the message, thereby allowing bigger vector values.
> For example, that will come into play for supporting LPI vectors
> on ARM, which start at 8192.
>
> Signed-off-by: Sunil Muthuswamy <sunilmut@xxxxxxxxxxxxx>
> ---
> drivers/pci/controller/pci-hyperv.c | 74 ++++++++++++++++++++++++++---
> 1 file changed, 68 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/pci/controller/pci-hyperv.c b/drivers/pci/controller/pci-hyperv.c
> index bebe3eeebc4e..de61b20f9604 100644
> --- a/drivers/pci/controller/pci-hyperv.c
> +++ b/drivers/pci/controller/pci-hyperv.c
> @@ -64,6 +64,7 @@ enum pci_protocol_version_t {
> PCI_PROTOCOL_VERSION_1_1 = PCI_MAKE_VERSION(1, 1), /* Win10 */
> PCI_PROTOCOL_VERSION_1_2 = PCI_MAKE_VERSION(1, 2), /* RS1 */
> PCI_PROTOCOL_VERSION_1_3 = PCI_MAKE_VERSION(1, 3), /* Vibranium */
> + PCI_PROTOCOL_VERSION_1_4 = PCI_MAKE_VERSION(1, 4), /* Fe */
> };
>
> #define CPU_AFFINITY_ALL -1ULL
> @@ -73,6 +74,7 @@ enum pci_protocol_version_t {
> * first.
> */
> static enum pci_protocol_version_t pci_protocol_versions[] = {
> + PCI_PROTOCOL_VERSION_1_4,
> PCI_PROTOCOL_VERSION_1_3,
> PCI_PROTOCOL_VERSION_1_2,
> PCI_PROTOCOL_VERSION_1_1,
> @@ -122,6 +124,8 @@ enum pci_message_type {
> PCI_CREATE_INTERRUPT_MESSAGE2 = PCI_MESSAGE_BASE + 0x17,
> PCI_DELETE_INTERRUPT_MESSAGE2 = PCI_MESSAGE_BASE + 0x18, /* unused */
> PCI_BUS_RELATIONS2 = PCI_MESSAGE_BASE + 0x19,
> + PCI_RESOURCES_ASSIGNED3 = PCI_MESSAGE_BASE + 0x1A,
> + PCI_CREATE_INTERRUPT_MESSAGE3 = PCI_MESSAGE_BASE + 0x1B,
> PCI_MESSAGE_MAXIMUM
> };
>
> @@ -235,6 +239,21 @@ struct hv_msi_desc2 {
> u16 processor_array[32];
> } __packed;
>
> +/*
> + * struct hv_msi_desc3 - 1.3 version of hv_msi_desc
> + * Everything is the same as in 'hv_msi_desc2' except that the size
> + * of the 'vector_count' field is larger to support bigger vector
> + * values. For ex: LPI vectors on ARM.
> + */
> +struct hv_msi_desc3 {
> + u32 vector;
> + u8 delivery_mode;
> + u8 reserved;
> + u16 vector_count;
> + u16 processor_count;
> + u16 processor_array[32];
> +} __packed;
> +
> /**
> * struct tran_int_desc
> * @reserved: unused, padding
> @@ -383,6 +402,12 @@ struct pci_create_interrupt2 {
> struct hv_msi_desc2 int_desc;
> } __packed;
>
> +struct pci_create_interrupt3 {
> + struct pci_message message_type;
> + union win_slot_encoding wslot;
> + struct hv_msi_desc3 int_desc;
> +} __packed;
> +
> struct pci_delete_interrupt {
> struct pci_message message_type;
> union win_slot_encoding wslot;
> @@ -1334,26 +1359,55 @@ static u32 hv_compose_msi_req_v1(
> return sizeof(*int_pkt);
> }
>
> +static void hv_compose_msi_req_get_cpu(struct cpumask *affinity, int *cpu,
> + u16 *count)
Isn't count redundant here? I don't see how this can be used safely for
passing back more than 1 cpu, since if cpu is pointing to an array, its
size is not specified.
Wei.
> +{
> + /*
> + * Create MSI w/ dummy vCPU set targeting just one vCPU, overwritten
> + * by subsequent retarget in hv_irq_unmask().
> + */
> + *cpu = cpumask_first_and(affinity, cpu_online_mask);
> + *count = 1;
> +}
> +
