On Mon, Jun 03, 2024 at 12:08:34PM +0200, Amna Waseem wrote: > Add a property to the binding to configure the Alert Polarity. > Alert pin is asserted based on the value of Alert Polarity bit of > Mask/Enable register. It is by default 0 which means Alert pin is > configured to be active low open collector. Value of 1 maps to > Inverted (active high open collector). > > Signed-off-by: Amna Waseem <Amna.Waseem@xxxxxxxx> > Reviewed-by: Rob Herring (Arm) <robh@xxxxxxxxxx> Applied. Note this is v3 which includes the Reviewed-by: tag since v4 does not have any other changes. I removed the trailing whitespace while applying the patch. Guenter > --- > Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml > index df86c2c92037..9190ef0bda54 100644 > --- a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml > +++ b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml > @@ -66,6 +66,14 @@ properties: > description: phandle to the regulator that provides the VS supply typically > in range from 2.7 V to 5.5 V. > > + ti,alert-polarity-active-high: > + description: Alert pin is asserted based on the value of Alert polarity Bit > + of Mask/Enable register. Default value is Normal (0 which maps to > + active-low open collector). The other value is Inverted > + (1 which maps to active-high open collector). Specify this property to set > + the alert polarity to active-high. > + $ref: /schemas/types.yaml#/definitions/flag > + > required: > - compatible > - reg > @@ -88,5 +96,6 @@ examples: > label = "vdd_3v0"; > shunt-resistor = <1000>; > vs-supply = <&vdd_3v0>; > + ti,alert-polarity-active-high; > }; > };
