On Thu, Nov 30, 2023 at 10:04:21AM +0100, Patrick Rudolph wrote: > The PECI CPU sensors are available as soon as the CPU is powered, > however the PECI DIMM sensors are available after DRAM has been > trained and thresholds have been written by host firmware. > > The default timeout of 30 seconds isn't enough for modern multisocket > platforms utilizing DDR5 memory to bring up the memory and enable PECI > sensor data. > Bump the default timeout to 10 minutes in case the system starts > without cached DDR5 training data. > > Signed-off-by: Patrick Rudolph <patrick.rudolph@xxxxxxxxxxxxx> Applied. Note that the affected driver (peci/dimmtemp) should be listed in the subject. I updated that. Guenter
