Use Xe HWMON subsystem to display the input voltage.
This is port from i915 hwmon.
v2:
- Rename hwm_get_vltg to hwm_get_voltage (Riana)
- Use scale factor SF_VOLTAGE (Riana)
Signed-off-by: Badal Nilawar <badal.nilawar@xxxxxxxxx>
---
.../ABI/testing/sysfs-driver-intel-xe-hwmon | 6 ++
drivers/gpu/drm/xe/regs/xe_gt_regs.h | 3 +
drivers/gpu/drm/xe/xe_hwmon.c | 67 +++++++++++++++++++
3 files changed, 76 insertions(+)
diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
index bee1d62bfddb..33a793b58157 100644
--- a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
+++ b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
@@ -44,5 +44,11 @@ Description: RW. Card reactive critical (I1) power limit in milliamperes.
the operating frequency if the power averaged over a window
exceeds this limit.
+What: /sys/devices/.../hwmon/hwmon<i>/in0_input
+Date: July 2023
+KernelVersion: 6.3
+Contact: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
+Description: RO. Current Voltage in millivolt.
+
Only supported for particular Intel xe graphics platforms.
diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
index eb7210afbd2c..cc452ec999fc 100644
--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
@@ -364,6 +364,9 @@
#define GT_GFX_RC6_LOCKED XE_REG(0x138104)
#define GT_GFX_RC6 XE_REG(0x138108)
+#define GT_PERF_STATUS XE_REG(0x1381b4)
+#define VOLTAGE_MASK REG_GENMASK(10, 0)
+
#define GT_INTR_DW(x) XE_REG(0x190018 + ((x) * 4))
#define GUC_SG_INTR_ENABLE XE_REG(0x190038)
diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index 7068120d9200..06b4251f26fd 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -3,7 +3,9 @@
* Copyright © 2023 Intel Corporation
*/
+#include <linux/hwmon-sysfs.h>
#include <linux/hwmon.h>
+#include <linux/types.h>
#include "regs/xe_mchbar_regs.h"
#include "regs/xe_gt_regs.h"
@@ -19,6 +21,7 @@ enum hwm_reg_name {
pkg_rapl_limit,
pkg_power_sku,
pkg_power_sku_unit,
+ gt_perf_status,
};
enum hwm_reg_operation {
@@ -31,9 +34,11 @@ enum hwm_reg_operation {
* SF_* - scale factors for particular quantities according to hwmon spec.
* - power - microwatts
* - curr - milliamperes
+ * - voltage - millivolts
*/
#define SF_POWER 1000000
#define SF_CURR 1000
+#define SF_VOLTAGE 1000
struct hwm_drvdata {
struct xe_hwmon *hwmon;
@@ -73,6 +78,11 @@ struct xe_reg hwm_get_reg(struct hwm_drvdata *ddat, enum hwm_reg_name reg_name)
else if (xe->info.platform == XE_PVC)
return PVC_GT0_PACKAGE_POWER_SKU_UNIT;
break;
+ case gt_perf_status:
+ if (IS_DG2(gt_to_xe(ddat->gt)))
+ return GT_PERF_STATUS;
+ else
+ return XE_REG(0);
default:
break;
}
@@ -239,6 +249,7 @@ static int hwm_power_rated_max_read(struct hwm_drvdata *ddat, long *value)
static const struct hwmon_channel_info *hwm_info[] = {
HWMON_CHANNEL_INFO(power, HWMON_P_MAX | HWMON_P_RATED_MAX | HWMON_P_CRIT),
HWMON_CHANNEL_INFO(curr, HWMON_C_CRIT),
+ HWMON_CHANNEL_INFO(in, HWMON_I_INPUT),
NULL
};
@@ -261,6 +272,22 @@ static int hwm_pcode_write_i1(struct xe_gt *gt, u32 uval)
uval);
}
+static int hwm_get_voltage(struct hwm_drvdata *ddat, long *value)
+{
+ u32 reg_val;
+
+ if (IS_DG2(gt_to_xe(ddat->gt))) {
+ process_hwmon_reg(ddat, gt_perf_status,
+ reg_read, ®_val, 0, 0);
+ /* HW register value in units of 2.5 millivolt */
+ *value = DIV_ROUND_CLOSEST(REG_FIELD_GET(VOLTAGE_MASK, reg_val) * 2500, SF_VOLTAGE);
+
+ return 0;
+ }
+
+ return -EOPNOTSUPP;
+}
+
static umode_t
hwm_power_is_visible(struct hwm_drvdata *ddat, u32 attr, int chan)
{
@@ -422,6 +449,40 @@ hwm_curr_write(struct hwm_drvdata *ddat, u32 attr, long val)
}
}
+static umode_t
+hwm_in_is_visible(struct hwm_drvdata *ddat, u32 attr)
+{
+ u32 reg_val;
+
+ switch (attr) {
+ case hwmon_in_input:
+ return process_hwmon_reg(ddat, gt_perf_status,
+ reg_read, ®_val, 0, 0) ? 0 : 0444;
+ default:
+ return 0;
+ }
+}
+
+static int
+hwm_in_read(struct hwm_drvdata *ddat, u32 attr, long *val)
+{
+ int ret;
+
+ xe_device_mem_access_get(gt_to_xe(ddat->gt));
+
+ switch (attr) {
+ case hwmon_in_input:
+ ret = hwm_get_voltage(ddat, val);
+ break;
+ default:
+ ret = -EOPNOTSUPP;
+ }
+
+ xe_device_mem_access_put(gt_to_xe(ddat->gt));
+
+ return ret;
+}
+
static umode_t
hwm_is_visible(const void *drvdata, enum hwmon_sensor_types type,
u32 attr, int channel)
@@ -438,6 +499,9 @@ hwm_is_visible(const void *drvdata, enum hwmon_sensor_types type,
case hwmon_curr:
ret = hwm_curr_is_visible(ddat, attr);
break;
+ case hwmon_in:
+ ret = hwm_in_is_visible(ddat, attr);
+ break;
default:
ret = 0;
}
@@ -463,6 +527,9 @@ hwm_read(struct device *dev, enum hwmon_sensor_types type, u32 attr,
case hwmon_curr:
ret = hwm_curr_read(ddat, attr, val);
break;
+ case hwmon_in:
+ ret = hwm_in_read(ddat, attr, val);
+ break;
default:
ret = -EOPNOTSUPP;
break;
--
2.25.1
