On Sat, Aug 06, 2022 at 08:58:49PM +0900, Tokunori Ikegami wrote: > Note: Sorry let me resend the mail below as text format since it was not > delivered to the mailing lists as contained HTML subpart. > > Hi, > > Thanks for your comments. > > On 2022/08/06 17:31, Guenter Roeck wrote: > > On Sat, Aug 06, 2022 at 02:46:06PM +0900, Tokunori Ikegami wrote: > > > NVMe drives support host controlled thermal management feature as optional. > > > The thermal management temperature are different from the temperature threshold. > > > So add functionality to set the throttling temperature values. > > > > > > Signed-off-by: Tokunori Ikegami <ikegami.t@xxxxxxxxx> > > I think actually the suggested attributes are not met with the throttling > temperatures as below. > > temp[1-*]_emergency: Temperature emergency max value, for chips supporting > more than two upper temperature limits. > temp[1-*]_lcrit: Temperature critical min value, typically lower than > corresponding temp_min values. > > Thermal Management Temperature 1 (TMT1): This field specifies the > temperature, in Kelvins, when the controller begins to transition to lower > power active power states or performs vendor specific thermal management > actions while minimizing the impact on performance (e.g., light throttling) > in order to attempt to reduce the Composite Temperature. > Thermal Management Temperature 2 (TMT2): This field specifies the > temperature, in Kelvins, when the controller begins to transition to lower > power active power states or perform vendor specific thermal management > actions regardless of the impact on performance (e.g., heavy throttling) in > order to attempt to reduce the Composite Temperature. > That happens a lot. That is neither a reason nor an argument to introducing new attributes to match chip descriptions. If we would do that, we would end up with lots and lots of different and unmanageable attributes. Please note that the functionality is associated with thermal management, so you might want to discuss your attributes with the thermal subsystem maintainers. Guenter
