On 10/1/19 3:17 PM, Nicolin Chen wrote:
Hello Guenter,
It's been nearly three weeks. Would it be possible for you to
provide some advice on my latest questions? I'd like to write
code and submit changes once ABI is confirmed...
Non-standard attribute discussions always require a lot of time,
since I have to re-read the chip documentation and try to understand
the reasoning why the attributes are needed. On top of that,
asking me "what should I do" instead of suggesting possible
solutions for me to choose from takes even more time, which
unfortunately I don't have right now. I'll try to get to it,
but, sorry, I can not promise you a time right now.
Guenter
Thank you!
On Thu, Sep 12, 2019 at 05:12:38PM -0700, Nicolin Chen wrote:
Datasheet: http://www.ti.com/lit/ds/symlink/ina3221.pdf
(At page 32, chapter 8.6.2.14 and 8.6.2.15)
I have two registers that I need to expose to user space:
Shunt-Voltage-Sum and Shunt-Voltage-Limit registers
Right now in[123]_input of INA3221 are for voltage channels
while in[456]_input are for Shunt voltage channels.
So can I just use in7_input and in7_crit for them?
Doesn't Shunt-Voltage-Limit apply to in[456]_input ?
If so, the limit should be attached to those.
The initial patch of ina3221 driver applied Shunt-Voltage-Limits,
being named as "Critical Alert Limit Registers" in the datasheet,
to curr[123]_crit, corresponding to curr[123] and in[456]_input.
And this Shunt-Voltage-Limit-Sum is more related to the reading
from Shunt-Voltage-Sum, which we just agreed it to be in7_input.
You didn't say Shunt-Voltage-Limit-Sum earlier. You said
Ah....right...it's my fault. Sorry.
Shunt-Voltage-Limit. I would agree that Shunt-Voltage-Limit-Sum is
associated with Shunt-Voltage-Sum, but, again, that is not what you
said earlier. Confused :-(
So, those two should be in7_input and in7_crit?
And a couple of more questions upon it:
1) There are 3 control bits for the summation of this
shunt-voltage-sum register to enable corresponding
input channels. But in7_enable only allows users to
en/disable all three channels at the same time. So
how should I attach three enable bits using ABI?
Or should I create a device-specific sysfs node?
2) We have a requirement of providing current-sum and
current-limit-sum nodes, for use cases where those
enabled channels use same value shunt resistors.
It's similar to provide curr[1-3]_crit by dividing
shunt[123]_resistor from in[456]_input. So could I
deploy curr4_input and curr4_crit nodes for this
requirement?
