Re: [PATCH v2 2/2] gpio: mlxbf3: Support add_pin_ranges()

[kernel test robot <lkp@xxxxxxxxx>]

Hi Asmaa,

kernel test robot noticed the following build warnings:

[auto build test WARNING on linusw-pinctrl/devel]
[also build test WARNING on linusw-pinctrl/for-next brgl/gpio/for-next linus/master v6.5-rc6 next-20230816]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Asmaa-Mnebhi/pinctrl-mlxbf3-Remove-gpio_disable_free/20230816-234711
base:   https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git devel
patch link:    https://lore.kernel.org/r/20230816154442.8417-3-asmaa%40nvidia.com
patch subject: [PATCH v2 2/2] gpio: mlxbf3: Support add_pin_ranges()
config: i386-buildonly-randconfig-r005-20230817 (https://download.01.org/0day-ci/archive/20230817/202308170926.sCNjFYJH-lkp@xxxxxxxxx/config)
compiler: clang version 16.0.4 (https://github.com/llvm/llvm-project.git ae42196bc493ffe877a7e3dff8be32035dea4d07)
reproduce: (https://download.01.org/0day-ci/archive/20230817/202308170926.sCNjFYJH-lkp@xxxxxxxxx/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@xxxxxxxxx>
| Closes: https://lore.kernel.org/oe-kbuild-all/202308170926.sCNjFYJH-lkp@xxxxxxxxx/

All warnings (new ones prefixed by >>):

>> drivers/gpio/gpio-mlxbf3.c:164:6: warning: unused variable 'ret' [-Wunused-variable]
           int ret;
               ^
   1 warning generated.


vim +/ret +164 drivers/gpio/gpio-mlxbf3.c

   160	
   161	static int mlxbf3_gpio_add_pin_ranges(struct gpio_chip *chip)
   162	{
   163		unsigned int id = 0;
 > 164		int ret;
   165	
   166		if (chip->ngpio % MLXBF3_GPIO_MAX_PINS_PER_BLOCK)
   167			id = 1;
   168	
   169		return gpiochip_add_pin_range(chip, "MLNXBF34:00",
   170				chip->base, id * MLXBF3_GPIO_MAX_PINS_PER_BLOCK,
   171				chip->ngpio);
   172	}
   173	

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